EE4301: Digital Design With Programmable Logic

4 Credits

Introduction to system design/simulation. Design using Verilog code/synthesis. Emulation using Verilog code. prereq: 2301, [1301 or CSCI 1113 or CSCI 1901]

View on University Catalog

All Instructors

B Average (3.026)Most Common: A (20%)

This total also includes data from semesters with unknown instructors.

279 students
SNWFDCBA

  • 5.03

    /6

    Recommend

  • 5.22

    /6

    Effort

  • 5.36

    /6

    Understanding

  • 4.93

    /6

    Interesting

  • 5.31

    /6

    Activities
      Contribute on our Github

      Gopher Grades is maintained by Social Coding with data from Summer 2017 to Summer 2025 provided by the University in response to a public records request

      Not affiliated with the University of Minnesota

      Privacy Policy